SPHINX-a VLSI processing element chip for pyramid computer

A VLSI processing element chip with a flexible clocking mode is presented. Each instruction can be executed in 4, 5, 7 clocking phases according to its clocking mode. A dual-outlet ALU was introduced to exploit the maximum intrainstruction parallelism. A condition flag and a special local pointer were introduced to realize some local or associative operations. Some design tradeoffs are discussed. This CMOS VLSI processing element chip was designed with compiled memory and standard cell, giving a transistor count of about 90000, and works with a clocking frequency of 14.3 MHz