DocumentCode :
2079514
Title :
High-speed simulation for neuron system base on FPGA
Author :
Zhang Ronghua ; Wang Jiang ; Li Shuangshuang ; Che Yanqiu
Author_Institution :
Sch. of Electr. Eng. & Autom., Tianjin Univ., Tianjin, China
fYear :
2010
fDate :
29-31 July 2010
Firstpage :
5500
Lastpage :
5504
Abstract :
Method for neuromorphic hardware implementing base on FPGA is researched. The concept of pipeline operator and pipeline model, which can supply a mathematical deduction for realizing the single-core multi-model, is defined. A realization of Morris-Lecar neural model with 12 stages pipeline is accomplished, and the code is embedded into the “Digital Neuromorphic Hardware Platform”. Error analysis for the result has been done in this paper.
Keywords :
error analysis; field programmable gate arrays; neural chips; FPGA; Morris-Lecar neural model; digital neuromorphic hardware platform; error analysis; field programmable gate array; high-speed simulation; mathematical deduction; neuron system; pipeline model; pipeline operator; Computational modeling; Digital signal processing; Field programmable gate arrays; Hardware; Mathematical model; Neurons; Pipelines; FPGA; Neuron; Pipeline;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Control Conference (CCC), 2010 29th Chinese
Conference_Location :
Beijing
Print_ISBN :
978-1-4244-6263-6
Type :
conf
Filename :
5572365
Link To Document :
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