Device-level analysis of a 1 μm BiCMOS inverter circuit operating at 77 K using a modified PISCES program

Author

Kuo, J.B. ; Chen, Y.W. ; Lou, K.H.

Author_Institution

Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan

fYear

1991

fDate

12-15 May 1991

Abstract

The authors present a device-level study on the steady-state and transient behavior of a 1-μm BiCMOS inverter circuit operating at 77 K using a modified PISCES program, where appropriate low-temperature device models with a large-scale simulation capability have been added. According to simulation results, at 77 K, the falltime is 35.2% longer than and the risetime is about identical to those at 300 K, due to a smaller output swing and a smaller non-negligible collector current in the BiNMOS transistor and a smaller BiPMOS emitter current at 77 K during pull-up transient. Circuit and device designs can be optimized to justify the low-temperature operation of BiCMOS circuits

Keywords

BIMOS integrated circuits; circuit analysis computing; cryogenics; integrated logic circuits; semiconductor device models; transient response; 1 micron; 77 K; BiCMOS inverter circuit; BiNMOS transistor; BiPMOS emitter current; device level analysis; large-scale simulation capability; low-temperature device models; low-temperature operation; modified PISCES program; pull-up transient; transient behavior; BiCMOS integrated circuits; Circuit simulation; Degradation; Design optimization; Inverters; Ionization; Large-scale systems; MOS devices; Steady-state; Temperature dependence;

fLanguage

English

Publisher

ieee

Conference_Titel

Custom Integrated Circuits Conference, 1991., Proceedings of the IEEE 1991

Conference_Location

San Diego, CA

Print_ISBN

0-7803-0015-7

Type

conf

DOI

10.1109/CICC.1991.164070

Filename

164070