Title :
Chip scale packaging using chip-on-flex technology
Author :
Fillion, Ray ; Burdick, Bill ; Shaddock, Dave ; Piacente, Pat
Author_Institution :
Gen. Electr. Corp. Res. & Dev. Center, Schenectady, NY, USA
Abstract :
An increasing number of electronic designers, fabricators and users see Chip Scale Packaging (CSP) as a way to obtain the benefits foreseen in multichip packaging and Chip-on-Board (COB) without the problems and limitations currently associated with each. The Chip-on-Flex (COF) multichip packaging technology has been demonstrated to be applicable to single chip packages that meet chip scale packaging goals. This paper looks at the Chip-on-Flex Chip Scale technology and addresses issues including the process, structure, assembly, yields and reliability
Keywords :
integrated circuit packaging; integrated circuit reliability; integrated circuit yield; microassembling; COF multichip packaging; assembly; chip scale packaging; chip-on-flex technology; reliability; yields; Bonding; Chip scale packaging; Copper; Electronics packaging; Gold; Metallization; Nickel; Packaging machines; Plastic integrated circuit packaging; Stability;
Conference_Titel :
Electronic Components and Technology Conference, 1997. Proceedings., 47th
Conference_Location :
San Jose, CA
Print_ISBN :
0-7803-3857-X
DOI :
10.1109/ECTC.1997.606238
