Title :
A VHDL synthesis framework
Author :
Baldwin, Reid A. ; Choi, Sea Hawon ; Chung, Moon Jung
Author_Institution :
Dept. of Comput. Sci., Michigan State Univ., East Lansing, MI, USA
Abstract :
We present a high level synthesis framework which guides the designer in devising design methodologies. The framework supports backtracking and parallel exploration of alternative methodologies. Encoded knowledge assists the designer in selecting methodologies and tools, while designers retain control during synthesis process. The framework facilitates maintainability and extendibility as new tools and methodologies are developed
Keywords :
VLSI; circuit layout CAD; specification languages; VHDL synthesis framework; VLSI circuits synthesis; backtracking; encoded knowledge; hardware description language; high level synthesis framework; parallel exploration; Automatic control; Circuit synthesis; Computer science; Design automation; Design methodology; High level synthesis; Moon; Scheduling; Software performance; Very large scale integration;
Conference_Titel :
VHDL International Users Forum. Spring Conference, 1994. Proceedings of
Conference_Location :
Oakland, CA
Print_ISBN :
0-8186-6215-8
DOI :
10.1109/VIUF.1994.323953
