Title :
A 5.8GHz low-IF multi-data rate GFSK transceiver with clock recovery and integrated 21dBm power amplifier
Author :
Quek, C. ; Farahvash, S. ; Roberts, W. ; Romney, M. ; Walker, D. ; Otten, C. ; Wei, R. ; Schwan, D. ; Mostafa, M. ; Haab, D. ; Liu, J. ; Liem, H. ; Koupal, R.
Author_Institution :
RF Micro Devices, San Jose, CA
fDate :
June 17 2008-April 17 2008
Abstract :
A highly integrated 5.8 GHz transceiver capable of supporting multiple data rates has been designed in 0.18 um SiGe BiCMOS for digital cordless phones and streaming audio applications. It also has a clock data recovery (CDR) circuit which can be supplied to baseband chips in conjunction with the digital received data. The transmitter with an integrated power amplifier consumes 185 mA achieving an output power of 20.5 dBm and the receiver consumes 65 mA achieving a sensitivity of -103.5 dBm and -101.5 dBm at 1.536 Mbps and 2.048 Mbps respectively. The active area is 7.3 mm2.
Keywords :
BiCMOS analogue integrated circuits; MMIC power amplifiers; frequency shift keying; transceivers; BiCMOS; baseband chips; bit rate 1.536 Mbit/s; bit rate 2.048 Mbit/s; clock data recovery; current 185 mA; current 65 mA; digital cordless phones; frequency 5.8 GHz; integrated power amplifier; low-IF multi-data rate GFSK transceiver; size 0.18 mum; streaming audio applications; Baseband; BiCMOS integrated circuits; Clocks; Germanium silicon alloys; Power amplifiers; Power generation; Silicon germanium; Streaming media; Transceivers; Transmitters; GFSK modulator; Low-IF receiver; Multi-data rate transceiver; digital cordless phone; power amplifiers;
Conference_Titel :
Radio Frequency Integrated Circuits Symposium, 2008. RFIC 2008. IEEE
Conference_Location :
Atlanta, GA
Print_ISBN :
978-1-4244-1808-4
Electronic_ISBN :
1529-2517
DOI :
10.1109/RFIC.2008.4561433
