System design for DSP in an integrated IC design environment

Many commercial CAE tools that are available to circuit and system designers only support a subset of the modeling levels needed to specify, analyze, design and verify digital signal processing systems. This restricts verification efforts as the design moves top-down from algorithm definition to hardware implementation. This paper describes a design environment that allows the designer to move through and mix different modeling levels and addresses the specific concerns of an IC solution. The modeling flexibility of VHDL serves as the foundation of this environment. The paper also includes an application example