Design automation system and architecture for high-performance integer applications

Author

Smith, Stewart G. ; Morgan, Ralph W. ; Payne, Julian G.

Author_Institution

VLSI Technol. EURL, Valbonne, France

fYear

1989

fDate

25-28 Sep 1989

Lastpage

38018

Abstract

A CAD system for design and synthesis of high-performance processors tailored to digital signal processing (DSP) applications is described. A unique design capture system supports independent specification of processor function, throughput, and accuracy, while a powerful circuit generation system isolates designers from details of the processor implementation. Circuits are assembled automatically according to an architectural blueprint, which is flexible enough in its use of innate parallelism to meet a wide range of throughput requirements with minimal waste of resources. The authors illustrate some multiplier instances in the parameter space and provide several snapshots from a design case study

Keywords

circuit CAD; digital signal processing chips; parallel architectures; CAD system; accuracy; architectural blueprint; circuit generation system; design capture system; digital signal processing; independent specification; innate parallelism; multiplier; parameter space; processor function; throughput; throughput requirements; Circuit synthesis; Computer aided instruction; Design automation; Digital signal processing; Flexible printed circuits; Pipeline processing; Signal design; Signal processing; Signal synthesis; Throughput;

fLanguage

English

Publisher

ieee

Conference_Titel

ASIC Seminar and Exhibit, 1989. Proceedings., Second Annual IEEE

Conference_Location

Rochester, NY

Type

conf

DOI

10.1109/ASIC.1989.123210

Filename

123210