DocumentCode
2082479
Title
A complete single-chip implementation of the JPEG image compression standard
Author
Bolton, Martin ; Boulton, Richard ; Martin, John ; Ng, Samuel ; Turner, Steve
Author_Institution
SGS-Thomson Microelectronics, Bristol, UK
fYear
1991
fDate
12-15 May 1991
Abstract
The authors present a still-picture compression chip which integrates the whole of the JPEG (Joint Photographic Experts Group) baseline standard, from image input to coded data stream output. The design has been implemented on a 1.2-μm CMOS process with a die size of 10×9 mm. An onboard microcontroller handles the interpretation and assembly of the compressed data stream
Keywords
CMOS integrated circuits; application specific integrated circuits; computerised picture processing; data compression; digital signal processing chips; 1.2 micron; CMOS process; JPEG image compression standard; Joint Photographic Experts Group; assembly; baseline standard; coded data stream output; die size; interpretation; onboard microcontroller; still-picture compression chip; Clocks; Code standards; Decoding; Image coding; Microcontrollers; Pipelines; Quantization; Registers; Streaming media; Transform coding;
fLanguage
English
Publisher
ieee
Conference_Titel
Custom Integrated Circuits Conference, 1991., Proceedings of the IEEE 1991
Conference_Location
San Diego, CA
Print_ISBN
0-7803-0015-7
Type
conf
DOI
10.1109/CICC.1991.164081
Filename
164081
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