Title :
A 25 MOPS systolic integer divider IC
Author :
Criado, A. Roberto
Author_Institution :
TRW LSI Products Inc., La Jolla, CA, USA
Abstract :
The divide function in signal processing systems is, in many instances, unavoidable, particularly when implementing range scaling, matrix operations, or perspective transforms, in system applications such as workstations, radar systems, and image processors. Traditionally this need has been fulfilled at the expense of reduced system speed and efficiency by relying on converging recursive techniques to carry out the division operation. The author reports the design and implementation of a 32-b fixed-point integer divider. The CMOS chip performs two´s-complement integer division of 32-b dividends and 16-b divisors without prenormalization, to produce a 32-b output quotient
Keywords :
CMOS integrated circuits; digital signal processing chips; dividing circuits; 32 bits; CMOS chip; divide function; fixed-point integer divider; image processors; matrix operations; output quotient; perspective transforms; radar systems; range scaling; signal processing systems; systolic integer divider IC; two´s-complement integer division; workstations; Arithmetic; Assembly; Circuits; Delay; Pipelines; Shift registers; Throughput;
Conference_Titel :
ASIC Seminar and Exhibit, 1989. Proceedings., Second Annual IEEE
Conference_Location :
Rochester, NY
DOI :
10.1109/ASIC.1989.123212
