• DocumentCode
    2082941
  • Title

    Design of a New Kind of LDPC Decoder

  • Author

    Jiang, Hanhong ; Zhong, Guifeng ; Li, Qing ; Wu, Wendan

  • Author_Institution
    Sch. of Electr. & Inf. Eng., Naval Univ. of Eng., Wuhan, China
  • fYear
    2009
  • fDate
    17-19 Oct. 2009
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    The properties of the LDPC (low-density parity-check) error-correcting codes are bearing down on Shannon limit, but it also needs to solve the problem of reducing the complexity of decoding as much as possible in practical applications. A new type of (1008, 3, 6) rules LDPC decoder was introduced in this paper. It adopted the min-sum-plus-correction-factor decoding algorithm and part parallel structure, which not only reduced the complexity of the hardware realization, but also improved the decoding speed. The maximum decoding rate could achieve 128 Mbit/s. These properties laid a good foundation for the actual application of LDPC.
  • Keywords
    decoding; parity check codes; Shannon limit; decoding complexity; low-density parity-check error-correcting codes; min-sum-plus-correction-factor decoding algorithm; Bismuth; Design engineering; Error correction codes; Gaussian channels; Hardware; Iterative algorithms; Iterative decoding; Parity check codes; Sum product algorithm; Turbo codes;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Image and Signal Processing, 2009. CISP '09. 2nd International Congress on
  • Conference_Location
    Tianjin
  • Print_ISBN
    978-1-4244-4129-7
  • Electronic_ISBN
    978-1-4244-4131-0
  • Type

    conf

  • DOI
    10.1109/CISP.2009.5301400
  • Filename
    5301400