DocumentCode
2083457
Title
Design methodologies for noise in digital integrated circuits
Author
Shepard, Kenneth L.
Author_Institution
Dept. of Electr. Eng., Columbia Univ., New York, NY, USA
fYear
1998
fDate
19-19 June 1998
Firstpage
94
Lastpage
99
Abstract
In this paper, we describe the growing problems of noise in digital integrated circuits and the design tools and techniques used to ensure the noise immunity of digital designs.
Keywords
circuit CAD; digital integrated circuits; noise; timing; design methodologies; design tools; digital designs; digital integrated circuits; noise immunity; Circuit noise; Design methodology; Digital integrated circuits; Failure analysis; Integrated circuit interconnections; Integrated circuit noise; Noise level; Permission; Threshold voltage; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference, 1998. Proceedings
Conference_Location
San Francisco, CA, USA
Print_ISBN
0-89791-964-5
Type
conf
Filename
724446
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