Title :
An integrated circuit for texture distance computation
Author :
Lakshmikanth, G. ; Abd-El-Barr, M.H. ; Raafat, H.M. ; Bolton, R.J.
Author_Institution :
Saskatchewan Univ., Saskatoon, Sask., Canada
Abstract :
A systolic-array-based architecture for texture distance computation is presented. Texture information is extracted and then represented as a set of histograms for various texture features. On the basis of this representation and the concept of event set distance, a transportation-like simplex algorithm is used to compute the texture distances between pairs of textures. Using this algorithm, the texture matching process is reduced to finding a solution to the streamlined transportation simplex problem. The solution to this problem requires two algorithms. The first algorithm is used to obtain the initial basic feasible solution (IBFS) based on Russel´s approximation. The second algorithm tests the optimality of the computed IBFS. The authors also present the design and implementation of a prototype VLSI chip which maps the systolic implementation of the two algorithms onto silicon
Keywords :
CMOS integrated circuits; VLSI; cellular arrays; computerised pattern recognition; computerised picture processing; digital signal processing chips; parallel architectures; CMOS technology; Russel´s approximation; event set distance; histograms; image processing; initial basic feasible solution; integrated circuit; optimality testing; prototype VLSI chip; simplex algorithm; streamlined transportation simplex problem; systolic-array-based architecture; texture distance computation; texture matching process; Algorithm design and analysis; Approximation algorithms; Computer architecture; Data mining; Histograms; Prototypes; Silicon; Testing; Transportation; Very large scale integration;
Conference_Titel :
ASIC Seminar and Exhibit, 1989. Proceedings., Second Annual IEEE
Conference_Location :
Rochester, NY
DOI :
10.1109/ASIC.1989.123217