Title :
Effect of technology scaling on RF performance of the transistors fabricated by standard CMOS technology
Author :
Kim, Han-Su ; Chung, Chulho ; Jeong, Joohyun ; Jung, Seung-Jae ; Lim, Jinsung ; Joe, JinHyoun ; Park, Jaehoon ; Lee, HyunWoo ; Jo, Gwangdoo ; Park, Kangwook ; Kim, Jedon ; Oh, Hansu ; Yoon, Jong Shik
Author_Institution :
Syst. LSI Div., Samsung Electron., Yongin
fDate :
June 17 2008-April 17 2008
Abstract :
Cut-off frequency (fT) of 300 GHz and 230 GHz for NMOS and PMOS is demonstrated for transistors with a gate length of 35 nm fabricated by 45 nm standard CMOS technology. Current gain (H21) and noise (flicker and thermal) is improved with scaling down technology. Power gain (Gu) increase is slow down and even saturated at 45 nm as technology advances. Such saturation in power gain is attributed to rapid increase in gds (drain conductance). Additional efforts are required to reduce gds for continuous improvement in power gain with the scaling. Vth optimization can be one of options to achieve better gds.
Keywords :
CMOS integrated circuits; MIMIC; flicker noise; millimetre wave field effect transistors; semiconductor device noise; thermal noise; CMOS technology; flicker noise; frequency 230 GHz; frequency 300 GHz; size 45 nm; thermal nosie; transistors; 1f noise; CMOS technology; Capacitance; Cutoff frequency; Extrapolation; Integrated circuit technology; MOS devices; Performance gain; Radio frequency; Transistors; Cut-off frequency; Drain conductance; Gain; Noise; RF FET; Threshold voltage;
Conference_Titel :
Radio Frequency Integrated Circuits Symposium, 2008. RFIC 2008. IEEE
Conference_Location :
Atlanta, GA
Print_ISBN :
978-1-4244-1808-4
Electronic_ISBN :
1529-2517
DOI :
10.1109/RFIC.2008.4561498