Predicting and scaling power consumption in CMOS ASICs

Author

Greggain, Lance ; White, Bill

Author_Institution

Genesis Microchip Inc., Markham, Ont., Canada

fYear

1989

fDate

25-28 Sep 1989

Lastpage

38139

Abstract

CMOS ASIC (application-specific integrated circuit) devices are known for their low power consumption, but with the increased complexity and high pin counts of today´s chips, even CMOS devices consume large amounts of power. The fundamentals of power consumption in CMOS ASICs and the many problems associated with predicting it are discussed. Both internal and external power are examined, as well as the effects of scaling

Keywords

CMOS integrated circuits; application specific integrated circuits; CMOS ASIC; application-specific integrated circuit; consumption prediction; power consumption; scaling; Application specific integrated circuits; Capacitors; Clocks; Diodes; Energy consumption; Fault location; Insulation; Integrated circuit interconnections; Parasitic capacitance; Power dissipation;

fLanguage

English

Publisher

ieee

Conference_Titel

ASIC Seminar and Exhibit, 1989. Proceedings., Second Annual IEEE

Conference_Location

Rochester, NY

Type

conf

DOI

10.1109/ASIC.1989.123219

Filename

123219

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2083581