Title :
Analog macrocell layout generation
Author :
Bowman, Robert J.
Author_Institution :
Dept. of Electr. Eng., Rochester Univ., NY, USA
Abstract :
An object-oriented imaging model that automatically generates the physical layout of commonly used analog circuit macrocells based on input from an annotated net list is discussed. It provides information on constructed cells sufficient for parasitic element extraction. the imaging model is technology independent within fundamental process families (CMOS, bipolar, etc.) and currently includes a library of CMOS analog macrocells and associated physical templates. Templates are described by synthesis rules and graphics operators for two-dimensional shape generation
Keywords :
CMOS integrated circuits; circuit layout CAD; linear integrated circuits; CAD; CMOS; analog circuit macrocells; annotated net list; cell library; computer aided design; graphics operators; macrocell layout generation; object-oriented imaging model; parasitic element extraction; physical templates; synthesis rules; two-dimensional shape generation; Analog circuits; CMOS process; CMOS technology; Data mining; Graphics; Libraries; Macrocell networks; Object oriented modeling; Semiconductor device modeling; Shape;
Conference_Titel :
ASIC Seminar and Exhibit, 1989. Proceedings., Second Annual IEEE
Conference_Location :
Rochester, NY
DOI :
10.1109/ASIC.1989.123228
