DocumentCode :
2083933
Title :
FACT: a framework for the application of throughput and power optimizing transformations to control-flow intensive behavioral descriptions
Author :
Lakshminarayana, Ganesh ; Jha, Niraj K.
Author_Institution :
Dept. of Electr. Eng., Princeton Univ., NJ, USA
fYear :
1998
fDate :
19-19 June 1998
Firstpage :
102
Lastpage :
107
Abstract :
In this paper, we present an algorithm for the application of a general class of transformations to control-flow intensive behavioral descriptions. Our algorithm is based on the observation that incorporation of scheduling information can help guide the selection and application of candidate transformations, and significantly enhance the quality of the synthesized solution. The efficacy of the selected throughput and power optimizing transformations is enhanced by the ability of our algorithm to transcend basic blocks in the behavioral description. This ability is imparted to our algorithm by a general technique we have devised. Our system currently supports associativity, commutativity, distributivity, constant propagation, code motion, and loop unrolling. It is integrated with a scheduler which performs implicit loop unrolling and functional pipelining, and has the ability to parallelize the execution of independent iterative constructs whose bodies can share resources. Other transformations can easily be incorporated within the framework. We demonstrate the efficacy of our algorithm by applying it to several commonly available benchmarks. Upon synthesis, behaviors transformed by the application of our algorithm showed up to 6-fold improvement in throughput over an existing transformation algorithm, and up to 4.5-fold improvement in power over designs produced without the benefit of our algorithm.
Keywords :
data flow analysis; formal specification; high level synthesis; real-time systems; FACT; associativity; benchmarks; code motion; commutativity; constant propagation; control-flow intensive behavioral descriptions; distributivity; framework; loop unrolling; power optimizing transformations; scheduling information; throughput application; Algorithm design and analysis; Control system synthesis; Digital systems; Embedded system; Explosives; High level synthesis; Iterative algorithms; Permission; Scheduling algorithm; Throughput;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation Conference, 1998. Proceedings
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-89791-964-5
Type :
conf
Filename :
724448
Link To Document :
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