Title :
Asynchronous adiabatic design of full adder using dual-rail domino logic
Author :
Kumar, A.K. ; Somasundareswari, D. ; Duraisamy, V. ; Nair, Manjula G.
Author_Institution :
ECE, Hindusthan Coll. of Eng. & Technol., Coimbatore, India
Abstract :
In this paper, asynchronous adiabatic design of full adder using dual-rail domino logic is proposed. Asynchronous adiabatic logic is an attractive approach of low-power design technique which combines the energy saving benefits of asynchronous systems with adiabatic benefits. In this work, a full adder using DRDAAL (Dual-Rail Domino with Asynchronous Adiabatic Logic) is designed and simulated, which exhibits better power-delay product and reliable logical operations. To improve the speed of circuits, dual-rail domino logic is introduced. The power-delay product of the proposed design is compared with the conventional CMOS full adder and the quasi-adiabatic families of full adder designs. Simulation results show better power-delay product characteristics for clock rates ranging from 100MHz to 200MHz.
Keywords :
adders; formal logic; logic design; DRDAAL logic; adiabatic benefit; asynchronous adiabatic design; circuit speed; clock rate; dual-rail domino with asynchronous adiabatic logic; energy saving benefit; frequency 100 MHz to 200 MHz; full adder; logical operation; low-power design technique; Asynchronous adiabatic logic; Full adder; Pass transistor logic; Power-delay product;
Conference_Titel :
Computational Intelligence & Computing Research (ICCIC), 2012 IEEE International Conference on
Conference_Location :
Coimbatore
Print_ISBN :
978-1-4673-1342-1
DOI :
10.1109/ICCIC.2012.6510234
