Title :
A low insertion loss, high linearity, T/R switch in 65 nm bulk CMOS for WLAN 802.11g applications
Author :
Han, Yiping ; Carter, Keith ; Larson, Lawrence E. ; Behzad, Arya
Author_Institution :
Univ. of California, San Diego, La Jolla, CA
fDate :
June 17 2008-April 17 2008
Abstract :
A transmit-receiver (T/R) switch is fabricated in a 65 nm CMOS process for WLAN 802.11 g applications. By floating the triple well device, the switch achieves low insertion loss, high power handling capability and good linearity simultaneously. In the transmit mode, the switch features 0.8 dB insertion loss, 29 dBm output P1dB and less than 0.2 dB EVM degradation at 24 dBm output power level. In the receive mode, it exhibits 1.6 dB insertion loss and 28 dB isolation at 2.45 GHz.
Keywords :
CMOS integrated circuits; UHF integrated circuits; transceivers; wireless LAN; T/R switch; WLAN IEEE 802.11g; bulk CMOS; frequency 2.45 GHz; high linearity; low insertion loss; size 65 nm; transmit-receiver switch; CMOS process; Diodes; Impedance; Inductors; Insertion loss; Linearity; Propagation losses; Switches; Voltage; Wireless LAN; 802.11; CMOS; EVM; T/R switches; WLAN; triple-well device;
Conference_Titel :
Radio Frequency Integrated Circuits Symposium, 2008. RFIC 2008. IEEE
Conference_Location :
Atlanta, GA
Print_ISBN :
978-1-4244-1808-4
Electronic_ISBN :
1529-2517
DOI :
10.1109/RFIC.2008.4561529