DocumentCode
2084492
Title
Survey and evaluation of various reversible carry skip BCD adders
Author
Praveena, M. ; Thanushkodi, K.
Author_Institution
Anna Univ., Chennai, India
fYear
2012
fDate
18-20 Dec. 2012
Firstpage
1
Lastpage
5
Abstract
Reversible circuits has gained remarkable attention due to its ability to recover from bit loss through unique mapping between its input and output vectors. This factor urges to perform the performance analysis of different reversible carry skip BCD adders. The different adders are analyzed individually to understand the various combinations of reversible gates used in the design construction of these adders. Moreover, the results highlights the strengths and weakness of various carry skip BCD adders.
Keywords
adders; binary codes; logic gates; binary coded decimal; reversible carry skip BCD adder; reversible gate circuit; vector; Binary Coded Decimal; Carry skip adder; Garbage output; Hardware complexity; Quantum Computing;
fLanguage
English
Publisher
ieee
Conference_Titel
Computational Intelligence & Computing Research (ICCIC), 2012 IEEE International Conference on
Conference_Location
Coimbatore
Print_ISBN
978-1-4673-1342-1
Type
conf
DOI
10.1109/ICCIC.2012.6510244
Filename
6510244
Link To Document