Composite device model enhances worst case simulation of bipolar analog ASICs

It is shown that practical simulations of worst-case performance of analog ASIC (application-specific integrated circuit) designs are enhanced by the use of a composite device model containing low, typical, and high sets of parameters. The composite model allows process related parameters, mismatch effects, and correlation between parameters to be included in single sets of simulations using sensitivity and Monte Carlo techniques. Results of these simulations provide the designer with design optimization data, sensitivity, test limits, and yield data