Composite device model enhances worst case simulation of bipolar analog ASICs

Author

Bray, Derek

Author_Institution

Valid Logic Syst. Inc., San Jose, CA, USA

fYear

1989

fDate

25-28 Sep 1989

Lastpage

37681

Abstract

It is shown that practical simulations of worst-case performance of analog ASIC (application-specific integrated circuit) designs are enhanced by the use of a composite device model containing low, typical, and high sets of parameters. The composite model allows process related parameters, mismatch effects, and correlation between parameters to be included in single sets of simulations using sensitivity and Monte Carlo techniques. Results of these simulations provide the designer with design optimization data, sensitivity, test limits, and yield data

Keywords

Monte Carlo methods; application specific integrated circuits; bipolar integrated circuits; circuit analysis computing; linear integrated circuits; semiconductor device models; sensitivity analysis; Monte Carlo techniques; application-specific integrated circuit; bipolar analog ASICs; composite device model; computer aided analysis; design optimization data; mismatch effects; process related parameters; sensitivity; test limits; worst case simulation; yield data; Application specific integrated circuits; Buffer storage; Circuit analysis; Circuit simulation; Computer aided software engineering; Integrated circuit modeling; Monte Carlo methods; Operational amplifiers; Temperature; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

ASIC Seminar and Exhibit, 1989. Proceedings., Second Annual IEEE

Conference_Location

Rochester, NY

Type

conf

DOI

10.1109/ASIC.1989.123244

Filename

123244