DocumentCode :
2085386
Title :
A DSM design flow: putting floorplanning, technology-mapping, and gate-placement together
Author :
Salek, Amir H. ; Lou, Jinan ; Pedram, Massoud
Author_Institution :
Dept. of Electr. Eng. Syst., Univ. of Southern California, Los Angeles, CA, USA
fYear :
1998
fDate :
19-19 June 1998
Firstpage :
128
Lastpage :
133
Abstract :
This paper presents an integrated design flow which combines floorplanning, technology mapping, and placement using a dynamic programming algorithm. The proposed design flow consists of five steps: maximum tree sub-structure formation, levelized cluster tree construction, minimum area implementation using 2-D shape functions, critical path identification, and repeated application of simultaneous floorplanning, technology mapping and gate placement along the timing critical paths. Experimental results obtained from an extensive set of benchmarks demonstrate the effectiveness of the proposed flow.
Keywords :
circuit layout CAD; dynamic programming; timing; 2-D shape functions; DSM design flow; benchmarks; critical path identification; dynamic programming algorithm; floorplanning; gate-placement; levelized cluster tree construction; maximum tree sub-structure formation; minimum area implementation; technology-mapping; Algorithm design and analysis; Contracts; Delay; Heuristic algorithms; Integrated circuit technology; Permission; Polynomials; Signal design; Simultaneous localization and mapping; Tree graphs;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation Conference, 1998. Proceedings
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-89791-964-5
Type :
conf
Filename :
724453
Link To Document :
بازگشت