DocumentCode :
2085882
Title :
Effective logic self repair based on extracted logic clusters
Author :
Gleichner, Christian ; Koal, Tobias ; Vierhaus, H.T.
Author_Institution :
Comput. Eng. Group, Brandenburg Univ. of Technol. Cottbus, Brandenburg, Germany
fYear :
2010
fDate :
23-25 Sept. 2010
Firstpage :
1
Lastpage :
6
Abstract :
Due to predictions and first experiences with large-scale integrated systems based on nano-size features, fault tolerance and eventually even self repair have become important technologies for the implementation of long-time dependable systems. While memory self test and self-repair is state-of-the-art in system design, logic in-system repair seems to be a much more challenging problem, due to the irregular structure of logic. The paper describes a concept of logic self repair, which gains effectiveness by extracting regular sub-circuits from arbitrary logic net lists.
Keywords :
automatic testing; built-in self test; fault tolerance; large scale integration; logic circuits; arbitrary logic net list; effective logic self repair; extracted logic cluster; fault tolerance; large-scale integrated system; memory self test; nanosize feature; Irrigation; Logic gates; Random access memory; Wiring;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Signal Processing Algorithms, Architectures, Arrangements, and Applications Conference Proceedings (SPA), 2010
Conference_Location :
Poznan
Print_ISBN :
978-1-4577-1485-6
Electronic_ISBN :
978-83-62065-07-3
Type :
conf
Filename :
5943728
Link To Document :
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