DocumentCode :
2085926
Title :
MOLE-a sea-of-gates detailed router
Author :
Srinivasan, Arvind ; Kuh, Ernest S.
Author_Institution :
Dept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA, USA
fYear :
1990
fDate :
12-15 Mar 1990
Firstpage :
446
Lastpage :
450
Abstract :
The authors present a new detailed router which was developed as part of a sea-of-gates layout project. It routes nets on two or more layers in a given rectangular or rectilinear region which may contain blockages and interior terminals in addition to terminals on the boundary. It uses a set of templates to perform routing and incorporates several novel features that address sea-of-gates routing issues. The router is very fast, memory efficient and yields excellent results
Keywords :
circuit layout CAD; MOLE; layout project; memory efficient; sea-of-gates detailed router; templates; Art; Chip scale packaging; International collaboration; Pins; Routing; Runtime;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation Conference, 1990., EDAC. Proceedings of the European
Conference_Location :
Glasgow
Print_ISBN :
0-8186-2024-2
Type :
conf
DOI :
10.1109/EDAC.1990.136689
Filename :
136689
Link To Document :
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