A 14 bit CMOS A/D converter based on dynamic current memories

Dynamic current memories allow the realization of accurate cyclic or pipeline A/D converters without requiring floating capacitors while being insensitive to linearity, hysteresis, and matching of components. A cyclic A/D converter based on this principle has been integrated in a 3-μm CMOS technology and exhibits a 14-bit linearity. The authors present fundamental limits in terms of speed, accuracy, and noise of cyclic (pipeline) converters based on dynamic current memories. Limiting factors for the accuracy are mainly the charge injection in the gate storage capacitance, and the output conductance of the MOS current memory. Charge injection is minimized by using carefully designed compensation switches and by controlling some gate voltages. The effect of the output conductance is reduced by using a cascode transistor whose drain voltage is controlled by a current conveyor