Transcedental functions on a shift-enabled reconfigurable device: CORDIC as a case-study

Presented is a mapping of a CORDIC algorithm to a recently proposed reconfigurable array geared towards the calculation of transcedental functions. This work demonstrates that the previously introduced shift-enabled embedded reconfigurable array (ShEERA) yields speed performance very close (and better in certain cases) to that of an ASIC generated with standard cells, but with a high degree of flexibility to eliminate recurring engineering costs. The ShEERA array outperformed a commercial FPGA by 3times to 20times with the same CORDIC algorithm mapped to the device. Delay and area performance are presented, and coupled with energy analysis which has been presented in prior art, the device shows excellent promise for use in embedded applications where cost, performance, and energy consumption are paramount.