• DocumentCode
    2087306
  • Title

    Low-temperature sintering of a nanosilver paste for attaching large-area power chips

  • Author

    Kewei Xiao ; Luo, Sheng ; Khai Ngo ; Lu, Guo-Quan

  • Author_Institution
    Dept. of Mater. Sci. & Eng., Virginia Tech, Blacksburg, VA, USA
  • fYear
    2013
  • fDate
    Feb. 27 2013-March 1 2013
  • Firstpage
    192
  • Lastpage
    202
  • Abstract
    A low-temperature silver sintering technology is emerging as a lead-free die-attach solution for high-reliability packaging of power electronics devices and modules. Sintered chips on substrate are reported to have excellent heat dissipation and capability of working at higher junction temperatures. However, one concerning issue with many of the silver sintering die-attach processes is the requirement of large uniaxial stress or pressure, ranging from 10 MPa to 40 MPa, to lower the sintering temperature to about 250°C. In this paper, we report our findings in the evaluation of a nanosilver paste technology developed to eliminate pressure needed for the silver-sintering die-attach process. The nanosilver paste was analyzed by TGA and DSC to show its weight loss and enthalpy characteristics associated with solvent evaporation, binder burn-out, and densification. A custom optical system was used to measure bond-line shrinkage behavior. A fractional factorial design of experiments was carried out to identify the importance and interaction of various processing parameters, such as pressure, temperature and time, on the bond strength and microstructure of sintered nanosilver joints. Based on the findings, a simple die-attach process, consisting of pressure-drying at 180°C under a few MPa pressure, followed by sintering below 260°C with zero pressure was found to produce strong die bonding with strength in excess of 30 MPa.
  • Keywords
    cooling; design of experiments; differential scanning calorimetry; drying; electronics packaging; enthalpy; lead; low-temperature techniques; microassembling; nanostructured materials; power electronics; shrinkage; silver; sintering; DSC; TGA; binder burn-out; bond strength; bond-line shrinkage behavior; custom optical system; densification; die bonding; enthalpy characteristics; fractional factorial design of experiments; heat capability; heat dissipation; high-reliability packaging; junction temperatures; large-area power chips; lead-free die-attach solution; low-temperature silver sintering technology; low-temperature sintering; microstructure; nanosilver paste technology; power electronics devices; power electronics modules; pressure-drying; processing parameters; silver sintering die-attach processes; silver-sintering die-attach process; sintered chips; sintered nanosilver joints; sintering temperature; solvent evaporation; substrate; time; uniaxial stress; weight loss; Abstracts; Heating; Silicon; Substrates; System-on-chip;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Advanced Packaging Materials (APM), 2013 IEEE International Symposium on
  • Conference_Location
    Irvine, CA
  • ISSN
    1550-5723
  • Print_ISBN
    978-1-4673-6093-7
  • Electronic_ISBN
    1550-5723
  • Type

    conf

  • DOI
    10.1109/ISAPM.2013.6510403
  • Filename
    6510403