The block optimal realization of denominator-separable 2-D digital filters

The problem of block optimal realizations of separable-in-denominator 2-D filters are considered. A general partial fraction expansion of a denominator separable 2-D transfer function is presented. Based on such expansion a new block optimal realization is derived with emphasis on real time processing in multiprocessor environment. In sequel, maximum parallelism, pipelining, reduction throughput delays are followed which can be utilized for VLSI circuit implementation. Furthermore, a criterion for the absence of limit cycles for a second order 2-D block is proposed