Title :
A design of ultra-low-voltage quadrature VCO
Author :
Jing Li ; Huihua Liu
Author_Institution :
Res. Inst. of Electron. Sci. & Technol., UESTC, Chengdu, China
Abstract :
A new quadrature voltage-controlled oscillator (QVCO) topology is proposed which consists of two same traditional low voltage-controlled oscillator and it is achieved by using back-gates coupling. The use of back-gates makes quadrature output clocks of voltage-controlled oscillator, reduces power dissipation and phase noise. That connecting the output terminal to the body terminal through resistor decreases the threshold voltage to low supply voltage. QVCO of the design use a standard 0.13 um 1P8M CMOS technology. At a supply voltage of 0.35 V, the total power dissipation is 2.60 mW. The frequency of output clock is 6.72 GHz.The phase noise at 1 MHz offset is -109.6 dBc/Hz, and the FOM(Figure-Of-Merit) is -182.0 dBc/Hz. The tuning range is from 6.21 GHz to 6.72 GHz. It is comparable or better than that of other state-of-the-art QVCO designs operating at much higher supply voltage.
Keywords :
CMOS integrated circuits; integrated circuit design; phase noise; voltage-controlled oscillators; back-gates coupling; body terminal; frequency 6.21 GHz to 6.72 GHz; low supply voltage; phase noise; power 2.60 mW; power dissipation; quadrature output clocks; quadrature voltage-controlled oscillator topology; size 0.13 mum; standard 1P8M CMOS technology; threshold voltage; ultra-low-voltage quadrature VCO; voltage 0.35 V; Couplings; Logic gates; Low voltage; Phase noise; Transistors; Voltage-controlled oscillators; back-gates coupling; low-voltage; quadrature VCO;
Conference_Titel :
Microwave and Millimeter Wave Circuits and System Technology (MMWCST), 2013 International Workshop on
Conference_Location :
Chengdu
DOI :
10.1109/MMWCST.2013.6814548