DocumentCode :
2087987
Title :
FPGA implementation of RVFTDNN for digital predistortion
Author :
Hongyun Huang ; Zhipeng Li ; Jingfu Bao
Author_Institution :
Sch. of Electron. Eng., Univ. of Electron. Sci. & Technol. of China, Chengdu, China
fYear :
2013
fDate :
24-25 Oct. 2013
Firstpage :
464
Lastpage :
467
Abstract :
Hardware implementation of real-valued focused time-delay neural network (RVFTDNN) in FPGA for digital predistortion is presented in this paper. The predistorter implemented in field programmable gate array (FPGA) using RVFTDNN is obtained based on model inverse with indirect learning scheme and trained offline with Levenberg-Marquardt (LM) algorithm. Measurement results show that more than 10dB improvement of adjacent channel power ration (ACPR) performance of the power amplifier (PA) can be obtained for single carrier WCDMA signal.
Keywords :
delays; distortion; field programmable gate arrays; learning (artificial intelligence); least squares approximations; linearisation techniques; neural nets; power amplifiers; ACPR performance; FPGA implementation; LM algorithm; Levenberg-Marquardt algorithm; PA; RVFTDNN; adjacent channel power ration; digital predistortion; field programmable gate array; hardware implementation; indirect learning scheme; power amplifier; real-valued focused time-delay neural network; single carrier WCDMA signal; Adaptation models; Educational institutions; Field programmable gate arrays; Radio frequency; Training; Adjacent channel power ration (ACPR); digital predistortion; field programmable gate array (FPGA); power amplifier; real-valued focused time-delay neural network (RVFTDNN);
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Microwave and Millimeter Wave Circuits and System Technology (MMWCST), 2013 International Workshop on
Conference_Location :
Chengdu
Type :
conf
DOI :
10.1109/MMWCST.2013.6814552
Filename :
6814552
Link To Document :
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