Boost derived topology as a power factor correction circuit

Author

Khan, A.F. ; Batarseh, Issa ; Siri, Kasemsan

Author_Institution

Dept. of Electr. & Comput. Eng., Central Florida Univ., Orlando, FL, USA

fYear

1994

fDate

10-13 Apr 1994

Firstpage

175

Lastpage

179

Abstract

This paper proposes a novel PWM converter which is a modified version of the conventional boost topology with output electrical isolation and zero-voltage switching (ZVS). The steady-state analysis and the control characteristic curves are presented. Also, the authors present a closed loop system for the converter as a power factor correction circuit (PFCC) application. The system uses voltage referencing and current sensing. This is achieved by implementing the commercially available chip ML4821 (average current mode controller) in the closed loop system. Circuit simulation based on PSPICE of the proposed topology is given. It is shown that the simulation and theoretical results are in agreement

Keywords

SPICE; circuit analysis computing; closed loop systems; digital simulation; electric current control; power convertors; power engineering computing; power factor correction; pulse width modulation; switching circuits; ML4821 chip; PSPICE; PWM converter; average current mode controller; boost topology; circuit simulation; closed loop system; control characteristic curves; current sensing; output electrical isolation; power factor correction circuit; steady-state analysis; voltage referencing; zero-voltage switching; Circuit testing; Circuit topology; Inductance; Magnetic switching; Power engineering and energy; Power factor correction; Switches; Switching circuits; Switching converters; Zero voltage switching;

fLanguage

English

Publisher

ieee

Conference_Titel

Southeastcon '94. Creative Technology Transfer - A Global Affair., Proceedings of the 1994 IEEE

Conference_Location

Miami, FL

Print_ISBN

0-7803-1797-1

Type

conf

DOI

10.1109/SECON.1994.324292

Filename

324292