• DocumentCode
    2088169
  • Title

    FPGA implementation of an universal space vector modulator

  • Author

    Tonelli, Mauricio ; Battaiotto, Pedro ; Valla, Maria I.

  • Author_Institution
    Electr. Eng. Dept., Univ. Nacional de La Plata, Argentina
  • Volume
    2
  • fYear
    2001
  • fDate
    2001
  • Firstpage
    1172
  • Abstract
    In this paper a new circuit implementation of a space vector PWM is presented. The modulator is developed using field-programmable gate array (FPGA) technology. The modulator takes the reference vector from the PC Bus, and constructs the modulated states to generate driving signals for the power switches. The modulator is a space vector PWM scheme including linear operation and transition to six-step mode. A dead time compensation technique is also considered. This modulator can be realized using a single IC from Altera, two EPROM´s memories and some electronic circuitry for sensing the inverter leg voltages needed in dead time compensation. The proposed circuit is built and tested extensively, presenting a satisfactory performance
  • Keywords
    DC-AC power convertors; PWM invertors; field programmable gate arrays; integrated circuits; Altera; EPROM´s memories; FPGA implementation; IC; PC Bus; PWM DC-AC converters; dead time compensation technique; driving signals generation; electronic circuitry; field-programmable gate array technology; induction motor; inverter leg voltages sensing; linear operation; modulated states; overmodulation range; power inverter; power switches; six-step mode; space vector PWM scheme; universal space vector modulator; Circuit testing; EPROM; Field programmable gate arrays; Leg; Power generation; Pulse width modulation inverters; Signal generators; Space technology; Space vector pulse width modulation; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Industrial Electronics Society, 2001. IECON '01. The 27th Annual Conference of the IEEE
  • Conference_Location
    Denver, CO
  • Print_ISBN
    0-7803-7108-9
  • Type

    conf

  • DOI
    10.1109/IECON.2001.975946
  • Filename
    975946