• DocumentCode
    2089275
  • Title

    Multi-input variable-threshold circuits for multi-valued logic functions

  • Author

    Syuto, Makoto ; Shen, Jing ; Tanno, Koichi ; Ishizuka, Okihiko

  • Author_Institution
    Miyazaki Univ., Japan
  • fYear
    2000
  • fDate
    2000
  • Firstpage
    27
  • Lastpage
    32
  • Abstract
    In this paper, two-types of Multi-Input Variable-Threshold (M-I V-T) circuits and their applications to Multi-Valued Logic (MVL) are proposed. M-I V-T circuits are extensions of binary CMOS NAND and NOR gates to multi-valued logic. First, definitions of M-I V-T functions realized with M-I V-T circuits are presented, they are implemented using neuron-MOS transistors. The neuron-MOS transistor is a novel device with multi-input gates and can be fabricated by the standard CMOS process with a double-poly layer. Therefore, the proposed circuits can be easily fabricated by the standard CMOS process instead of using the multi-level ion implantation process. Second, the characteristics of the proposed circuits are evaluated using HSPICE simulations. Third, realization of a product term using M-I V-T circuits is presented. The circuit implementation of the product term is extended naturally from the literal circuit and is more powerful than the literal circuit. Finally, the synthesis of a MVL function with M-I V-T circuits is discussed
  • Keywords
    multivalued logic circuits; threshold logic; Multi-Input Variable-Threshold; binary CMOS; multi-input gates; multi-valued logic functions; variable-threshold circuits; Circuits; Multivalued logic;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Multiple-Valued Logic, 2000. (ISMVL 2000) Proceedings. 30th IEEE International Symposium on
  • Conference_Location
    Portland, OR
  • ISSN
    0195-623X
  • Print_ISBN
    0-7695-0692-5
  • Type

    conf

  • DOI
    10.1109/ISMVL.2000.848596
  • Filename
    848596