Title :
An accurate MOS transistor model for submicron VLSI circuit-BSIMplus
Author :
Gowda, Sudhir M. ; Sheu, Bing J. ; Cable, James S.
Author_Institution :
Univ. of Southern California, Los Angeles, CA, USA
Abstract :
An accurate MOS transistor model that is suitable for the simulation of analog and digital circuits with deep submicron channel-length transistors is presented. The BSIMplus model uses a compact set of device physics-based parameters. Continuity of the drain current and derivatives in subthreshold, linear, and saturation regions of operation has been achieved. A novel geometric dependence scheme allows consistent simulation of transistors over the entire design space. Experimental results on NMOS and PMOS transistors with effective channel lengths down to 0.15 μm are presented
Keywords :
MOS integrated circuits; VLSI; insulated gate field effect transistors; semiconductor device models; 0.15 micron; BSIMplus model; MOS transistor model; NMOS transistors; PMOS transistors; analog circuits; deep submicron channel-length; device physics-based parameters; digital circuits; drain current continuity; geometric dependence scheme; linear region; saturation regions; simulation; submicron VLSI; subthreshold-region; CMOS technology; Circuit simulation; Image processing; MOSFETs; Semiconductor device modeling; Semiconductor process modeling; Signal processing; Space technology; Threshold voltage; Very large scale integration;
Conference_Titel :
Custom Integrated Circuits Conference, 1991., Proceedings of the IEEE 1991
Conference_Location :
San Diego, CA
Print_ISBN :
0-7803-0015-7
DOI :
10.1109/CICC.1991.164107
