An accurate MOS transistor model for submicron VLSI circuit-BSIMplus

An accurate MOS transistor model that is suitable for the simulation of analog and digital circuits with deep submicron channel-length transistors is presented. The BSIMplus model uses a compact set of device physics-based parameters. Continuity of the drain current and derivatives in subthreshold, linear, and saturation regions of operation has been achieved. A novel geometric dependence scheme allows consistent simulation of transistors over the entire design space. Experimental results on NMOS and PMOS transistors with effective channel lengths down to 0.15 μm are presented