Automatic custom layout of analog ICs using constraint-based module generation

Author

Chen, David J. ; Sheu, Bing J.

Author_Institution

Univ. of Southern California, Los Angeles, CA, USA

fYear

1991

fDate

12-15 May 1991

Abstract

A systematic method for automatic custom layout of analog integrated circuits is presented. This method uses analog circuit recognition and critical net analysis techniques to derive proper layout constraints for analog circuit performance optimization. Constraint-driven analog floorplanning and routing techniques are developed to generate custom layouts which incorporate the layout constraints. This method can be applied to handle a wide variety of analog circuit modules as well as analog subsystems. Experimental results on CMOS operational amplifiers and a comparator are presented

Keywords

application specific integrated circuits; circuit layout CAD; linear integrated circuits; ASIC; CAD; CMOS operational amplifiers; analog ICs; analog circuit recognition; automatic custom layout; comparator; constraint-based module generation; critical net analysis; floorplanning; integrated circuits; performance optimization; routing techniques; Analog circuits; Automation; Circuit analysis; Circuit noise; Circuit synthesis; Coupling circuits; Degradation; Routing; Signal generators; Signal processing;

fLanguage

English

Publisher

ieee

Conference_Titel

Custom Integrated Circuits Conference, 1991., Proceedings of the IEEE 1991

Conference_Location

San Diego, CA

Print_ISBN

0-7803-0015-7

Type

conf

DOI

10.1109/CICC.1991.164116

Filename

164116