DocumentCode
2089981
Title
Accelerating Numerical Linear Algebra Kernels on a Scalable Run Time Reconfigurable Platform
Author
Biswas, Prasenjit ; Udupa, Pramod P. ; Mondal, Rajdeep ; Varadarajan, Keshavan ; Alle, Mythri ; Nandy, S.K. ; Narayan, Ranjani
Author_Institution
CADL, IISc, Bangalore, India
fYear
2010
fDate
5-7 July 2010
Firstpage
161
Lastpage
166
Abstract
Numerical Linear Algebra (NLA) kernels are at the heart of all computational problems. These kernels require hardware acceleration for increased throughput. NLA Solvers for dense and sparse matrices differ in the way the matrices are stored and operated upon although they exhibit similar computational properties. While ASIC solutions for NLA Solvers can deliver high performance, they are not scalable, and hence are not commercially viable. In this paper, we show how NLA kernels can be accelerated on REDEFINE, a scalable runtime reconfigurable hardware platform. Compared to a software implementation, Direct Solver (Modified Faddeev´s algorithm) on REDEFINE shows a 29X improvement on an average and Iterative Solver (Conjugate Gradient algorithm) shows a 15-20% improvement. We further show that solution on REDEFINE is scalable over larger problem sizes without any notable degradation in performance.
Keywords
conjugate gradient methods; linear algebra; reconfigurable architectures; sparse matrices; ASIC solutions; NLA kernels; NLA solvers; REDEFINE; computational property; conjugate gradient algorithm; dense matrices; direct solver; hardware acceleration; modified Faddeev´s algorithm; numerical linear algebra kernels; scalable run time reconfigurable platform; software implementation; sparse matrices; Arrays; Delay; Hardware; Kernel; Sparse matrices; Throughput; Tiles; Conjugate Gradient; Direct Solver; Faddeev´s algorithm; Iterative Solver; Numerical Linear Algebra; Runtime reconfiguration; Systolic array;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI (ISVLSI), 2010 IEEE Computer Society Annual Symposium on
Conference_Location
Lixouri, Kefalonia
Print_ISBN
978-1-4244-7321-2
Type
conf
DOI
10.1109/ISVLSI.2010.65
Filename
5572764
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