Title :
A novel 3 volts-only, small sector erase, high density flash E/sup 2/PROM
Author :
Kianian, S. ; Levi, A. ; Lee, D. ; Yaw-Wen Hu
Author_Institution :
Silicon Storage Technol. Inc., Sunnyvale, CA, USA
Abstract :
A split gate Flash E/sup 2/PROM memory cell with Fowler-Nordhiem tunneling erase, and high efficiency hot electron programming is presented. Gate current measurements show that one out of every 300 channel electrons is injected into the gate under worst case programming conditions. The greater efficiency of cell allows the use of small on-chip multipliers for single 3v Vcc operation. High cell reliability is achieved through low floating gate oxide field (oxide reliability) and small programming current (contact reliability). It is shown that the cell is immune to read and write disturb conditions.<>
Keywords :
EPROM; MOS integrated circuits; PLD programming; VLSI; cellular arrays; integrated circuit testing; integrated memory circuits; multiplying circuits; 3 V; Fowler-Nordhiem tunneling erase; cell reliability; disturb conditions; gate current measurements; high density flash E/sup 2/PROM; hot electron programming; low floating gate oxide field; on-chip multipliers; programming current; small sector erase; split gate memory cell; worst case programming conditions; Energy consumption; Geometry; Integrated circuit interconnections; Low voltage; Nonvolatile memory; PROM; Secondary generated hot electron injection; Silicon; Split gate flash memory cells; Tunneling;
Conference_Titel :
VLSI Technology, 1994. Digest of Technical Papers. 1994 Symposium on
Conference_Location :
Honolulu, HI, USA
Print_ISBN :
0-7803-1921-4
DOI :
10.1109/VLSIT.1994.324372
