Title :
TEFET-a high density, low erase voltage, trench flash EEPROM
Author :
Di-Son Kuo ; Simpson, M. ; Tsou, L. ; Mukherjee, S.
Author_Institution :
Philips Lab., Briarcliff Manor, NY, USA
Abstract :
A novel three-dimensional flash EEPROM cell named the TEFET (Trench Embedded Field Enhanced Tunneling) has been developed for ultra high density memory applications. The cell technology is compatible with standard CMOS processes. It provides very small cell size, large read current, low erase voltage, greatly improved cycling endurance, and excellent scalability as compared to conventional planar cells.<>
Keywords :
CMOS integrated circuits; EPROM; VLSI; cellular arrays; integrated memory circuits; CMOS processes; TEFET; cell size; cell technology; cycling endurance; erase voltage; read current; scalability; three-dimensional cell; trench embedded field enhanced tunneling; trench flash EEPROM; ultra high density memory applications; CMOS process; EPROM; Hard disks; Hot carriers; Laboratories; Lithography; Low voltage; Nonvolatile memory; Scalability; Tunneling;
Conference_Titel :
VLSI Technology, 1994. Digest of Technical Papers. 1994 Symposium on
Conference_Location :
Honolulu, HI, USA
Print_ISBN :
0-7803-1921-4
DOI :
10.1109/VLSIT.1994.324382
