DocumentCode
2090398
Title
DC Offset Modeling and Noise Minimization for Differential Amplifier in Subthreshold Operation
Author
Rajput, Kapil K. ; Saini, Anil K. ; Bose, Subash C.
Author_Institution
Central Electron. Eng. Res. Inst. (CSIR), Pilani, India
fYear
2010
fDate
5-7 July 2010
Firstpage
247
Lastpage
252
Abstract
This work presents the rigorous formulation of input referred offset voltage for differential amplifier, having the input pair devices in subthreshold region of operation. The formulation has been verified in 0.35 μm and 0.18 μm CMOS technologies by using Monte Carlo Simulation. Minimization of 1/f noise is the additional advantage of this method.
Keywords
1/f noise; CMOS analogue integrated circuits; Monte Carlo methods; differential amplifiers; integrated circuit noise; 1/f noise; CMOS technology; DC offset modeling; Monte Carlo simulation; differential amplifier; input pair device; noise minimization; size 0.18 nm; size 0.35 mum; subthreshold operation; Differential amplifiers; Equations; MOS devices; Mathematical model; Noise; Threshold voltage; Transconductance;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI (ISVLSI), 2010 IEEE Computer Society Annual Symposium on
Conference_Location
Lixouri, Kefalonia
Print_ISBN
978-1-4244-7321-2
Type
conf
DOI
10.1109/ISVLSI.2010.46
Filename
5572780
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