Title :
A Hardware Implement of Bus Bridge Based on Single CPU and Dual Bus Architecture
Author :
Wang, Tiedong ; Shao, FengJing ; Sun, Rencheng ; Huang, He
Author_Institution :
Inf. & Eng. Dept., Qingdao Univ., Qingdao, China
Abstract :
Single CPU dual bus architecture is a new kind of architecture aimed at reducing the security vulnerability of Von Neumann architecture, and it has been proved theoretically reasonable. In this paper, a bus bridge is implemented to bridge CPU and dual bus. The experiment is done and the result has proved that the architecture based on single CPU and dual bus is reasonable and effective.
Keywords :
computer architecture; peripheral interfaces; bus bridge hardware implement; dual bus architecture; single CPU bus architecture; Bridges; Computer architecture; Computer networks; Computer security; Data security; Hardware; Information security; National security; Secure storage; System buses; Dual Bus; architecture; bus bridge; single CPU;
Conference_Titel :
Computer Science and Computational Technology, 2008. ISCSCT '08. International Symposium on
Conference_Location :
Shanghai
Print_ISBN :
978-1-4244-3746-7
DOI :
10.1109/ISCSCT.2008.106
