Title :
Exploring the limits of cycle time for VLSI processing
Author :
Doering, R.R. ; Reed, D.W.
Author_Institution :
Semicond. Process & Design Center, Texas Instrum. Inc., Dallas, TX, USA
Abstract :
Theoretical cycle time of 17.5 hours has been demonstrated on 13-mask 0.35-/spl mu/m CMOS using 100% single-wafer processing and real-time process control. The process time during which "the wafer state was being altered" was only 9.4 hours. In this experiment, total cycle time of less than 72 hours (3 days) was demonstrated. Under ideal conditions (e.g., no queues) it should be possible to manufacture advanced ICs with cycle times as short as approximately 2 hours per mask level.<>
Keywords :
CMOS integrated circuits; VLSI; integrated circuit technology; process control; 0.35 micron; 17.5 h; CMOS; VLSI processing; cycle time; ideal conditions; mask level; real-time process control; single-wafer processing; CMOS process; Circuits; Electric breakdown; Instruments; Manufacturing processes; Metrology; Process control; Production facilities; Pulp manufacturing; Very large scale integration;
Conference_Titel :
VLSI Technology, 1994. Digest of Technical Papers. 1994 Symposium on
Conference_Location :
Honolulu, HI, USA
Print_ISBN :
0-7803-1921-4
DOI :
10.1109/VLSIT.1994.324392
