DocumentCode
2090577
Title
Novel Architecture for Highly Hardware Efficient Implementation of Real Time Matrix Inversion Using Gauss Jordan Technique
Author
Chandrakanth, V. ; Kuloor, Ramachandra
Author_Institution
Electron. & Radar Dev. Establ. (LRDE), Bangalore, India
fYear
2010
fDate
5-7 July 2010
Firstpage
294
Lastpage
298
Abstract
Advent of Matrix Theory has greatly aided and simplified the analysis for variety of signal processing algorithms. It has been proven that matrix notation is convenient for representation of signals and to perform operations on them. Many problems such as signal modeling, Wiener filtering and spectrum estimation require finding the solution or solutions to a set of linear equations. Some of the common matrix related operations include transpose, triangularization, determinant calculation, eigen value decomposition and matrix inversion. Most of these operations are computationally intensive and have been difficult to implement on real time systems and therefore are not pursued much in VLSI design. In this paper we present a highly hardware efficient and simple memory based novel architecture implementing widely established Gauss Jordan technique for finding matrix inverse. First triangularization of the matrix is done which on further processing calculates the inverse matrix.
Keywords
VLSI; integrated circuit design; matrix inversion; Gauss Jordan technique; VLSI design; Wiener filtering; determinant calculation; eigen value decomposition; hardware efficient implementation; linear equations; matrix notation; matrix theory; matrix triangularization; real time matrix inversion; signal modeling; signal processing algorithms; signal representation; spectrum estimation; Algorithm design and analysis; Clocks; Computer architecture; Hardware; Matrix converters; Matrix decomposition; Random access memory; FPGA; Gauss Jordan technique; MMSE;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI (ISVLSI), 2010 IEEE Computer Society Annual Symposium on
Conference_Location
Lixouri, Kefalonia
Print_ISBN
978-1-4244-7321-2
Type
conf
DOI
10.1109/ISVLSI.2010.100
Filename
5572789
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