Power estimation and power measurement of Xilinx Virtex FPGAs: trade-offs and limitations

The power consumption of reconfigurable systems has become a fundamental aspect in designing applications. Especially for mobile systems with a limited power supply, it is necessary to identify and optimize the power loss. Moreover, it is essential to evaluate during application development time exact power trade-offs, especially including the consideration of the dynamic reconfiguration phases of corresponding devices, e.g. the Virtex-series from Xilinx. This paper discusses the exact power consumption trade-offs between the measured runtime consumption of a mapped application and the measured reconfiguration-time consumption of different dynamically (partially and completely) reconfigured applications. Moreover, the possibilities and limitations of today´s available power estimation tools are discussed and compared to the exact measurements.