DocumentCode
2091020
Title
Metastability of CMOS master/slave flip-flops
Author
Gabara, T.J. ; Cyr, G.J. ; Stroud, C.E.
Author_Institution
AT&T Bell Lab., Allentown, PA, USA
fYear
1991
fDate
12-15 May 1991
Abstract
The authors present circuit techniques used to improve the mean time between failures (MTBF) of a latch due to metastable events. The complete approach includes a unique design of the latch and the formation of series-connected master/slave (M/S) flip-flops using this latch. An equation is developed to predict the MTBF due to metastability of a single latch and is extended to include single and multiple series connected M/S flip-flops. The equation predicts that the MTBF increases significantly by using such a M/S flip-flop configuration
Keywords
CMOS integrated circuits; circuit reliability; flip-flops; integrated logic circuits; CMOS master/slave flip-flops; circuit techniques; flip-flop configuration; latch; mean time between failures; metastable events; multiple series connected; Apertures; Application specific integrated circuits; Clocks; Equations; Flip-flops; Frequency; Latches; Logic; Master-slave; Metastasis;
fLanguage
English
Publisher
ieee
Conference_Titel
Custom Integrated Circuits Conference, 1991., Proceedings of the IEEE 1991
Conference_Location
San Diego, CA
Print_ISBN
0-7803-0015-7
Type
conf
DOI
10.1109/CICC.1991.164129
Filename
164129
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