DocumentCode :
2091270
Title :
A 10 bit 75 mega-sample per second A/D converter
Author :
Marsh, James ; Lofstrom, Keith ; Engert, H. Joseph ; Price, Burt
Author_Institution :
Tektronix Inc., Beaverton, OR, USA
fYear :
1991
fDate :
12-15 May 1991
Abstract :
Metastability and limitations in sample frequency in subranging A/D (analog-to-digital) converter topologies are explored. A monolithic 10-b A/D converter utilizing multiple subranging digitizers to eliminate metastable states and increase sample speed is presented. This converter uses an extension of the dual rank architecture to eliminate the potential for metastable states associated with the coarse rank thresholds. Highly linear input amplifiers are utilized to drive the residue signal, simplifying the input drive requirements. The residue amplifier incorporates clamping circuitry to minimize the effect of overdrive signals on settling time and accuracy
Keywords :
analogue-digital conversion; bipolar integrated circuits; A/D converter; accuracy; clamping circuitry; converter topologies; dual rank architecture; linear input amplifiers; metastable states; monolithic ADC; multiple subranging digitizers; overdrive signals; residue amplifier; sample frequency; settling time; Capacitance; Circuit topology; Clamps; Error correction; Frequency conversion; Latches; Logic circuits; Metastasis; Power dissipation; Signal resolution;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Custom Integrated Circuits Conference, 1991., Proceedings of the IEEE 1991
Conference_Location :
San Diego, CA
Print_ISBN :
0-7803-0015-7
Type :
conf
DOI :
10.1109/CICC.1991.164139
Filename :
164139
Link To Document :
بازگشت