Bridging the Gap between Global Routing and Detailed Routing: A Practical Congestion Model

To capture detailed routing congestion factors in sub-90nm technology nodes, we propose a practical congestion model embedded in 3-D global routing grid graph. Using a concept of pass-through capacity and demand, intra-gcell congestion contributed by fat vias, stacked vias, local nets and related design rules can be measured and optimized. Proposed congestion model is compatible with existing widely-used path search algorithms in global routing. Experimental results validate proposed model, and demonstrate that 42% less design rule violations and 46% shorter full-flow routing runtime, as well as 3% shorter wire length and 4% less via count in detailed routing results can be achieved using proposed congestion model in global routing stage.