PEST-a tool for implementing pseudo-exhaustive self test

PEST is a CAD tool for implementing pseudo-exhaustive self test in integrated circuits. PEST´s unique features are: parallel testing of all cones; global test point selection; and a new cost effective scheme for test vector generation. AT&T´s network interface controller chip was designed using PEST. Effective 100% fault coverage without fault simulation or test generation was obtained with less than 24% transistor overhead. This paper begins with an overview of PEST´s approach. The test generation algorithm is then described. Finally, the implementation of PEST in the network interface controller is presented