Title :
Pre-placement of VLSI blocks through learning neural networks
Author :
Caviglia, D.D. ; Bisio, G.M. ; Curatelli, F. ; Giovannacci, L. ; Raffo, L.
Author_Institution :
Genova Univ., Italy
Abstract :
This paper presents a new neural network approach to the pre-placement of VLSI blocks. The authors´ innovation consists in considering the pre-placement problem as a classification problem, and in implementing a neural network learning algorithm, derived from Kohonen maps, to accomplish this task. The neural network has been simulated and the results have been compared with those obtained from a classical min-cut algorithm. The comparison shows as the authors´ technique offers comparable quality of solutions, but presents a more favourable computational complexity
Keywords :
VLSI; circuit layout CAD; computational complexity; learning systems; neural nets; Kohonen maps; VLSI blocks; classical min-cut algorithm; classification problem; computational complexity; neural nets learning; preplacement; Biological neural networks; Circuits; Computational modeling; Design optimization; Minimization; Neural networks; Partitioning algorithms; Self organizing feature maps; Technological innovation; Very large scale integration;
Conference_Titel :
Design Automation Conference, 1990., EDAC. Proceedings of the European
Conference_Location :
Glasgow
Print_ISBN :
0-8186-2024-2
DOI :
10.1109/EDAC.1990.136726