Title :
Physical compact model for threshold voltage in short-channel double-gate devices
Author :
Kim, Keunwoo ; Fossum, Jerry G. ; Chuang, Ching-Te
Author_Institution :
IBM T. J. Watson Res. Center, Yorktown Heights, NY, USA
Abstract :
Compact physics/process-based model for threshold voltage in double-gate devices is presented. Drain-induced barrier lowering and short-channel-induced barrier lowering models for double-gate and bulk-Si devices are derived. The validity and predictability of the models are demonstrated and confirmed by numerical device simulation results for extremely scaled (L/sub eff/=25 nm) double-gate and bulk-Si devices.
Keywords :
MOSFET; semiconductor device models; 25 nm; physical compact model; predictability; short-channel double-gate devices; threshold voltage; validity; Back; Capacitance; Current-voltage characteristics; Extrapolation; Intrusion detection; MOSFET circuits; Photonic band gap; Predictive models; Threshold voltage; Transconductance;
Conference_Titel :
Simulation of Semiconductor Processes and Devices, 2003. SISPAD 2003. International Conference on
Conference_Location :
Boston, MA, USA
Print_ISBN :
0-7803-7826-1
DOI :
10.1109/SISPAD.2003.1233677
