Design of a configurable order statistic filter with FPGAs

Author

Hu, Ming ; Vainio, Olli ; Gevorkian, David

Author_Institution

Dept. of Inf. Technol., Tampere Univ. of Technol., Finland

Volume

2

fYear

2000

fDate

2000

Firstpage

1095

Abstract

The efficiency and properties of nonlinear digital filters are difficult to quantify with formal methods. Therefore, determining the effects of a nonlinear digital filter on overall system performance often requires simulations or prototyping. This paper presents a fast way to design a configurable order statistic filter with field programmable gate arrays (FPGAs) in a unified computer-aided design environment. Based on an innovative architecture, a window size nine, eight-bit filter fits in a single small and inexpensive component

Keywords

digital filters; field programmable gate arrays; logic CAD; nonlinear filters; nonlinear network synthesis; FPGA; configurable order statistic filter; eight-bit filter; field programmable gate arrays; formal methods; logic design; nonlinear digital filters; prototyping; simulation; unified computer-aided design; window size nine; Boolean functions; Computational modeling; Design automation; Digital filters; Electronic mail; Field programmable gate arrays; Information technology; Statistics; System performance; Virtual prototyping;

fLanguage

English

Publisher

ieee

Conference_Titel

Instrumentation and Measurement Technology Conference, 2000. IMTC 2000. Proceedings of the 17th IEEE

Conference_Location

Baltimore, MD

ISSN

1091-5281

Print_ISBN

0-7803-5890-2

Type

conf

DOI

10.1109/IMTC.2000.848922

Filename

848922